/*----------------------------------------------------------------------------
 * Copyright (c) <2013-2015>, <Huawei Technologies Co., Ltd>
 * All rights reserved.
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 * are permitted provided that the following conditions are met:
 * 1. Redistributions of source code must retain the above copyright notice, this list of
 * conditions and the following disclaimer.
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 * of conditions and the following disclaimer in the documentation and/or other materials
 * provided with the distribution.
 * 3. Neither the name of the copyright holder nor the names of its contributors may be used
 * to endorse or promote products derived from this software without specific prior written
 * permission.
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
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 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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 *---------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------
 * Notice of Export Control Law
 * ===============================================
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#ifndef __HIFMC100_H__
#define __HIFMC100_H__

#include "linux/mtd/mtd.h"
#include "spinor_ids.h"

#define HIFMC100_SPI_NOR_CS_NUM         0

/*****************************************************************************/
#define HIFMC100_DMA_ALIGN_SIZE         (CACHE_ALIGNED_SIZE)
#define HIFMC100_DMA_ALIGN_MASK         (HIFMC100_DMA_ALIGN_SIZE-1)
#define HIFMC100_DMA_MAX_SIZE           (4096)
#define HIFMC100_DMA_MAX_MASK           (HIFMC100_DMA_MAX_SIZE - 1)


#ifdef  LOSCFG_DRIVERS_SPI_BLOCK_PROTECT
#define DEBUG_SPI_NOR_BP        0

#define SPI_NOR_SR_SRWD_SHIFT   7
#define SPI_NOR_SR_SRWD_MASK    (1 << SPI_NOR_SR_SRWD_SHIFT)

#define SPI_NOR_SR_BP0_SHIFT    2
#define SPI_NOR_SR_BP_WIDTH_4   0xf
#define SPI_NOR_SR_BP_MASK_4    (SPI_NOR_SR_BP_WIDTH_4 << SPI_NOR_SR_BP0_SHIFT)

#define SPI_NOR_SR_BP_WIDTH_3   0x7
#define SPI_NOR_SR_BP_MASK_3    (SPI_NOR_SR_BP_WIDTH_3 << SPI_NOR_SR_BP0_SHIFT)

#define SPI_NOR_SR_TB_SHIFT     3
#define SPI_NOR_SR_TB_MASK      (1 << SPI_NOR_SR_TB_SHIFT)

#define SPI_NOR_SR_TB_SHIFT_S   5
#define SPI_NOR_SR_TB_MASK_S    (1 << SPI_NOR_SR_TB_SHIFT_S)

#define SPI_BP_BOTTOM_RDCR_SET_S(config)        ((config) | \
                                                (0x01 << SPI_NOR_SR_TB_SHIFT_S))
#define SPI_BP_BOTTOM_RDCR_SET(config)          ((config) | \
                                                (0x01 << SPI_NOR_SR_TB_SHIFT))

#define SPI_BP_BOTTOM_RDSR_SET_1(bp_num)        (0x1 << (2 + bp_num))
#define SPI_BP_BOTTOM_RDSR_SET_0(bp_num)        (~(0x1 << (2 + bp_num)))

#define LOCK_LEVEL_MAX(bp_num)                  (((0x01) << bp_num) - 1)

#define SPI_CMD_RDCR_MX                 0x15    /* MXIC Read Config Register */

#endif /* CONFIG_SPI_BLOCK_PROTECT */

#define SR_DBG      0
#define QR_DBG      0
#define WE_DBG      0
#define QE_DBG      0
#define AC_DBG      0
#define DMA_DBG     0

int hisi_spi_nor_op_reg(struct spi *spi, unsigned char opcode, unsigned int len, unsigned char optype);
#ifdef LOSCFG_DRIVERS_DTR_MODE_SUPPORT
void hifmc_check_spi_dtr_support(struct spi *spi, u_char *ids);
#endif

#ifdef LOSCFG_DRIVERS_SPI_BLOCK_PROTECT
void hifmc100_spi_flash_lock(struct spinor_info *spinor, unsigned char cmp, unsigned char level, unsigned char op);
unsigned short hifmc100_set_spi_lock_info(struct spinor_host *host);
unsigned short hifmc100_handle_bp_rdcr_info(struct spinor_host *host, u_char cmd);
unsigned char hifmc100_bp_to_level(struct spinor_host *host);
unsigned short hifmc100_handle_bp_rdsr_info(struct spinor_host *host, u_char cmd);
void hifmc100_get_bp_lock_level(struct spinor_host *host);
void hifmc100_spi_lock(struct spinor_host *host, unsigned char level);
void hifmc100_set_bp_level(struct spinor_host *host, unsigned char level);
void spi_lock_update_address(struct spinor_host *host);
void hifmc100_get_bp_lock_level(struct spinor_host *host);
#endif


#endif /* End of __HIFMC100_H__ */

